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verilog syntax like c??

hello again,

Im currently learning verilog, cause im interning, and i've heard it's a lot like c, which would be good, cause i gotta take csci 1300, which is c.  Is it true that they are alike??  also, what's the diff between c,c++,c#, and .net?


Thursday, June 26, 2003 is your friend.

Boy oh boy...
Thursday, June 26, 2003

A 10-second look at tells me that Verilog is approximately like C, or like Basic ... many languages are similar (they have procedures, variables, flow-control statements like "if", and so on).

C++ is a superset of C. It includes features which aren't found in C, to support "object-oriented" programming.

C# is a Microsoft-proprietary language, derived from C++ and Java (Java is a language designed by Sun, to be a less complicated language than C++; C++ is complicated partly because it supports all features of C, including pointers and explcit memory management).

.NET is a Microsoft library and development environment. C# is one of the .NET languages.

Christopher Wells
Thursday, June 26, 2003

Since it's often slow, google queries like "verilog" can be useful.

Also, you might want to read this:
because you're likely to hit hostilities in forums like this without knowing why.

das gringo
Thursday, June 26, 2003

It's the same except it compiles to a net-list of cell interconnects instead of compiling to a linear-list of machine instructions.

Also, every function runs simultaneously in parallel, unlike an executable which can basically only run one instruction at a time, barring multiple processors.

Also, there's no such thing as standard types.

And you can't step through it in a debugger - you have to run a simulation of all the lectrical signals in the whole chip you are making, feeding it test signals you have generated and comparing the output to what you are expecting.

Other than that and a few other things, they are identical. Any competant C programmer should be able to get up to speed on VLSI hardware design in six weeks, tops.

Hardware Designer
Thursday, June 26, 2003

That ("6 weeks, tops") triggered my iron-y detector.

Christopher Wells
Thursday, June 26, 2003

Copper interconnects are all the rage nowadays Christopher, not iron! Iron is not used in VLSI at all, so we can safely say it's not a case in which being irony is relevant.

Hardware Designer
Thursday, June 26, 2003

I don't have a big irony detector, but the more I read "get up to speed on VLSI design" the more I'm sure I'm getting signal from it.

Christopher Wells
Thursday, June 26, 2003

You're correct -- an understanding of signals is crucial. All kinds of signals moving through the chip and its important to tell them apart.

Hardware Designer
Thursday, June 26, 2003

Just to add that you might want to get very familiar with state machines if you are learning digital design (and how they are implemented in verilog).

Xilinx engineer
Friday, February 20, 2004

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